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searching for Single instruction, multiple data 23 found (73 total)

alternate case: single instruction, multiple data

STARAN (165 words) [view diff] exact match in snippet view article find links to article

processor which uses content-addressable memory. STARAN is a single instruction, multiple data array processor with a 4x256 1-bit processing element (PE)

Efficiently updatable neural network (375 words) [view diff] no match in snippet view article find links to article

re-evaluated once the king moved. It used incremental computation and single instruction multiple data (SIMD) techniques along with appropriate intrinsic instructions

Blitzen (computer) (155 words) [view diff] exact match in snippet view article

The Blitzen was a miniaturized SIMD (single instruction, multiple data) computer system designed for NASA in the late 1980s by a team of researchers at

PA-7100LC (894 words) [view diff] exact match in snippet view article find links to article

to implement the MAX-1 multimedia instructions, an early single instruction, multiple data (SIMD) multimedia instruction set extension that provided

Intrinsic function (781 words) [view diff] exact match in snippet view article find links to article

Collection (GCC) implement intrinsics that map directly to the x86 single instruction, multiple data (SIMD) instructions (MMX, Streaming SIMD Extensions (SSE)

Loop optimization (1,501 words) [view diff] exact match in snippet view article find links to article

loop-sectioning is a loop-transformation technique for enabling SIMD (single instruction, multiple data)-encodings of loops and improving memory performance. This

OpenRISC (1,541 words) [view diff] exact match in snippet view article find links to article

multiple processors. Another notable feature is a rich set of single instruction, multiple data (SIMD) instructions intended for digital signal processing

Intel Advisor (1,039 words) [view diff] no match in snippet view article find links to article

the oneAPI Base Toolkit. Vectorization is the operation of Single Instruction Multiple Data (SIMD) instructions (like Intel Advanced Vector Extensions

AVR32 (1,478 words) [view diff] no match in snippet view article find links to article

the AVR32B architecture, and supports a hardware FPU, SIMD (single instruction multiple data) DSP (digital signal processing) instructions to the RISC instruction-set

4D vector (436 words) [view diff] exact match in snippet view article find links to article

support for 4D vectors with instructions dealing with 4 lane single instruction, multiple data (SIMD) instructions, usually with a 128-bit data path and

Bit slicing (1,606 words) [view diff] no match in snippet view article find links to article

virtual machines using general logic instructions to perform single-instruction multiple-data (SIMD) operations. This technique is also known as SIMD within

Alpha 21264 (2,682 words) [view diff] no match in snippet view article find links to article

Instructions (MVI), an extension to the Alpha Architecture defining single instruction multiple data (SIMD) instructions for multimedia. The load store units are

Merge algorithm (2,087 words) [view diff] no match in snippet view article find links to article

specialized sorting circuits, as well as in modern processors with single-instruction multiple-data (SIMD) instructions. Existing parallel algorithms are based

Qualcomm Hexagon (3,064 words) [view diff] exact match in snippet view article find links to article

next one starts. The Hexagon micro-architecture supports single instruction, multiple data operations, which means that when a Hexagon device receives

Alpha 21164 (3,041 words) [view diff] no match in snippet view article find links to article

(MVI), an extension to the Alpha Architecture which introduced single instruction multiple data (SIMD) instructions for improving the performance of MPEG encoding

AMD K6-III (1,612 words) [view diff] no match in snippet view article find links to article

instruction set developed by Advanced Micro Devices (AMD). It added single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling

Pentium (original) (3,593 words) [view diff] exact match in snippet view article

Pentium MMX also added the MMX instruction set, a basic integer single instruction, multiple data (SIMD) instruction set extension marketed for use in multimedia

Smith–Waterman algorithm (4,666 words) [view diff] exact match in snippet view article find links to article

implementation of the Smith–Waterman algorithm using the single instruction, multiple data (SIMD) technology available in Intel Pentium MMX processors

GraalVM (2,060 words) [view diff] no match in snippet view article find links to article

0.2 In this release, the GraalVM team added a novel SIMD (Single Instruction Multiple Data) vectorization optimization for sequential code, and a Strip

Actian Vector (2,221 words) [view diff] exact match in snippet view article find links to article

allows to involve the principles of vector processing and single instruction, multiple data (SIMD)— to perform the same operation on multiple data simultaneously

MIPS architecture processors (3,604 words) [view diff] exact match in snippet view article find links to article

mixed with add-in units such as floating-point units (FPU), single instruction, multiple data (SIMD) systems, various input/output (I/O) devices, etc. MIPS

RISC-V (15,576 words) [view diff] exact match in snippet view article find links to article

use the floating-point registers' bits to perform parallel single instruction, multiple data (SIMD) sub-word arithmetic. In 2017 a vendor published a more

Intel microcode (5,167 words) [view diff] no match in snippet view article find links to article

MMX instructions to Pentium Pro processor-specific uops (new Single Instruction Multiple Data [SIMD] uops were added to implement the new functionality)