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searching for Victim cache 6 found (12 total)

Apple A9 (1,382 words) [view diff] exact match in snippet view article find links to article

cores, and a 4 MB L3 cache that services the entire SoC and acts as a victim cache. The A9 also features a custom PowerVR Series7XT @ 650 MHz GPU, featuring

Alpha 21264 (2,660 words) [view diff] no match in snippet view article find links to article

cache, a primary cache and secondary cache. The level three (L3, or "victim") cache of the Alpha 21164 was not used due to problems with bandwidth. The

Athlon (4,986 words) [view diff] exact match in snippet view article find links to article

L2) and a fast region (the L1), making the L2 cache into basically a victim cache. With the new cache design, need for high L2 performance and size was

Apple silicon (13,581 words) [view diff] case mismatch in snippet view article find links to article

November 12, 2013. "Correcting Apple's A9 SoC L3 Cache Size: A 4 MB Victim Cache". AnandTech. November 30, 2015. Archived from the original on December

AMD 10h (5,521 words) [view diff] exact match in snippet view article find links to article

cache as opposed to L2 cache with K8 family 32-way set associative L3 victim cache sized at least 2 MB, shared between processing cores on a single die

SPARC64 V (5,947 words) [view diff] exact match in snippet view article find links to article

instructions A 512-entry, four-way set-associative TLB for data, no victim cache Page sizes: 8 KB, 64 KB, 512 KB, 4 MB, 32 MB, 256 MB, 2 GB The SPARC64