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searching for SSSE3 10 found (145 total)

alternate case: sSSE3

Motorola RAZR i (778 words) [view diff] exact match in snippet view article find links to article

threads), single Penwell core, 568 Kb total cache (MMX, SSE, SSE2, SSE3, SSSE3, EM64T, NX/XD, HT, BPT) Memory: 1024 MB LPDDR2-800 RAM / 8192 MB ROM Available

cannot store some instruction independently. Some instruction from SSE2/SSE3/SSSE3 require this feature for integer operation, for example instruction like

Open Watcom Assembler (1,111 words) [view diff] exact match in snippet view article find links to article

Pro), x86-64 instruction sets with SIMD (MMX, 3DNow!, SSE, SSE2, SSE3 and SSSE3, SSE4.1/2 (since Jwasm), AVX (since JWasm 2.06), VMX (Intel VT-x; AMD SVM

Mer (software distribution) (1,640 words) [view diff] exact match in snippet view article

Core_i486 Generic i486+ X86 port i586 i586 i586, i686 Core:i586 Core_i586 SSSE3 enabled X86 port x86_64 x86_64 x86_64 Core:x86_64 Core_x86_64 Generic 64

List of VIA microprocessor cores (410 words) [view diff] exact match in snippet view article find links to article

"NCORE" neural processor for AI acceleration. supports: MMX SSE SSE2 SSE3 SSSE3 SSE4.1 SSE4.2 AES AVX AVX2 FMA3 SHA AVX512 AVX512F AVX512CD AVX512BW AVX512DQ

Intel C++ Compiler (1,769 words) [view diff] exact match in snippet view article find links to article

unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability

Vortex86 (1,684 words) [view diff] exact match in snippet view article find links to article

cmpxchg8b and cmov instructions, but only the master core has SSE, SSE2, SSE3, SSSE3 and NX support . Maximum DDR3 RAM capacity is 2 GB. It can also use ECC

GNSS software-defined receiver (1,687 words) [view diff] exact match in snippet view article find links to article

NavPort-4, SX3 frontend Host computer special hardware supported: SIMD (SSE2, SSSE3), CUDA Multicore supported: yes GNSS/SBAS signals support: GPS: L1CA, L2C

X86-64 (11,625 words) [view diff] exact match in snippet view article find links to article

LAHF-SAHF lahf POPCNT popcnt SSE3 addsubpd SSE4_1 blendpd SSE4_2 pcmpestri SSSE3 pshufb x86-64-v3 AVX vzeroall Intel Haswell and newer Intel "big" cores

Intel Core (9,428 words) [view diff] exact match in snippet view article find links to article

Cove Crestmont Instruction set x86-64 Instructions MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX-512, TSX, AES-NI, FMA3, AVX-VNNI Extensions