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searching for Program status word 13 found (34 total)

Z/Architecture (3,428 words) [view diff] no match in snippet view article find links to article

FPR0–FPR15 1 32-bit floating-point control (FPC) register 1 128-bit program-status word (PSW), which includes a 64-bit instruction address An 8-KiB prefix

Intel MCS-51 (6,491 words) [view diff] exact match in snippet view article find links to article

(SFR) include the accumulators A (or ACC, at E0) and B (at F0) and program status word (or PSW, at D0), themselves, as well as the 16-bit data pointer DPTR

Heterogeneous Element Processor (1,025 words) [view diff] exact match in snippet view article find links to article

sixteen PEMs could be connected) was rather unconventional; via a "program status word (PSW) queue" up to fifty processes could be maintained in hardware

On-line Debugging Tool (742 words) [view diff] case mismatch in snippet view article find links to article

sets the PC to the start of the program and the deposit to the PSW [Program Status Word] locks out interrupts. The effect of this will be to write a stream

Intel 8085 (4,980 words) [view diff] case mismatch in snippet view article find links to article

internal stack). Instructions such as PUSH PSW, POP PSW affect the Program Status Word (accumulator and flags). The accumulator stores the results of arithmetic

Intel MCS-48 (1,068 words) [view diff] case mismatch in snippet view article find links to article

(bit position) Main registers A Accumulator PC Program Counter Program Status Word CY AC FO BS 1 Stack Note: All other programmer-visible registers

Intel 8080 (4,581 words) [view diff] exact match in snippet view article find links to article

bits. The accumulator and the flags together are called the PSW, or program status word. PSW can be pushed to or popped from the stack. As with many other

IBM System/4 Pi (1,611 words) [view diff] exact match in snippet view article find links to article

addressing memory; later this was extended with four bits from the program status word register, allowing a directly addressable memory range of 1M locations

MODCOMP and the later 8051-compatible processors use bits in the program status word to select the currently active register bank. The usual layout convention

Signetics 2650 (3,731 words) [view diff] case mismatch in snippet view article find links to article

"Cycle Last" on pin 25, which marks the instruction fetch cycle. Program Status Word Upper bits 3 and 4 are settable and testable user flags (unused on

IBM Enterprise Systems Architecture (1,087 words) [view diff] no match in snippet view article find links to article

Control-Register Fields. S370-ESA, p. 4-5, Program-Status-Word Format. S390-ESA, p. 4-5, Program-Status-Word Format. "IBM 3090 PROCESSOR UNIT MODELS 280E

IBM System/370-XA (1,049 words) [view diff] case mismatch in snippet view article find links to article

software. This was addressed by adding an addressing mode bit to the Program Status Word controlling whether the program runs in 24-bit mode, in which the

MTS system architecture (13,096 words) [view diff] exact match in snippet view article find links to article

real memory, all the job's virtual memory, general registers, and program status word to magnetic tape), tracking the amount of processor time used and