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alternate case: arithmetic shift
PDP-11 architecture
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DIV multiply and divide integer operand to register pair ASH, ASHC arithmetic – shift a register or a register pair. For a positive number it will shiftWD16 (3,466 words) [view diff] exact match in snippet view article find links to article
lower-numbered register. 32 bit values are used by MUL, DIV and some rotate and arithmetic shift instructions. Floating point values are 48 bits long and can only beFeedback with Carry Shift Registers (1,077 words) [view diff] exact match in snippet view article find links to article
distribution of sub-blocks, ideal arithmetic autocorrelations, and the arithmetic shift and add property. They are the with-carry analog of m-sequences orArithmetic logic unit (3,324 words) [view diff] exact match in snippet view article find links to article
of the bit shifted into the operand depends on the type of shift. Arithmetic shift: the operand is treated as a two's complement integer, meaning thatBalanced ternary (4,106 words) [view diff] exact match in snippet view article find links to article
arithmetic shift left of a balanced ternary number is the equivalent of multiplication by a (positive, integral) power of 3; and an arithmetic shift rightMIC-1 (532 words) [view diff] exact match in snippet view article find links to article
directly to the C bus. The shifter is used to perform logical and arithmetic shift operations, by simply setting respectively the control signal SLL8LEB128 (1,440 words) [view diff] exact match in snippet view article find links to article
necessary if the implementation of >>= uses a logical shift rather than an arithmetic shift for a signed left operand */ if (negative) value |= (~0 << (size -EDSAC (3,667 words) [view diff] exact match in snippet view article find links to article
Subtract Multiply-and-add AND-and-add (called "Collate") Shift left Arithmetic shift right Load multiplier register Store (and optionally clear) accumulatorPIC instruction listings (4,299 words) [view diff] exact match in snippet view article find links to article
Ws,Wd Z N Wd ← Ww >> Ws, arithmetic shift right 1 1 0 1 1 1 1 0 1 w d 1 0 0 k ASR Wv,#u4,Wd Z N Wd ← Ww >> k, arithmetic shift right 1 1 0 1 1 1 1 1 0CSG 65CE02 (2,150 words) [view diff] case mismatch in snippet view article find links to article
increment and decrement a value in memory, and ASW/ROW to perform an Arithmetic Shift (left) Word or ROtate (left) Word. More minor changes include the additionPDP-8 (7,043 words) [view diff] exact match in snippet view article find links to article
Normalize 7413 – SHL – Shift left (immediate word follows) 7415 – ASR – Arithmetic shift right 7417 – LSR – Logical shift right A 12-bit word can have 4,096MOS Technology 6502 (11,743 words) [view diff] exact match in snippet view article find links to article
of the opcode that was later assigned to ROR is effectively an ASL (arithmetic shift left) instruction that does not affect the carry bit in the statusList of Java bytecode instructions (166 words) [view diff] exact match in snippet view article find links to article
result int shift left ishr 7a 0111 1010 value1, value2 → result int arithmetic shift right istore 36 0011 0110 1: index value → store int value into variableTI MSP430 (7,964 words) [view diff] no match in snippet view article find links to article
@SP+,PC Return from subroutine RLA.x dst ADD.x dst,dst Rotate left arithmetic (shift left 1 bit) RLC.x dst ADDC.x dst,dst Rotate left through carry SBC