Prefetch input queue – link to Prefetching

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Fetching the instruction [[opcode]]s from program [[Computer memory|memory]] well in advance is known as [[~~Instruction prefetch|~~prefetching]] and it is served by using a '''prefetch input queue''' (PIQ). The pre-fetched instructions are stored in a [[FIFO (computing and electronics)|queue]]. The fetching of opcodes well in advance, prior to their need for execution, increases the overall efficiency of the [[Microprocessor|processor]] boosting its speed. The processor no longer has to wait for the memory access operations for the subsequent instruction opcode to complete. This architecture was prominently used in the [[Intel 8086|Intel 8086 microprocessor]].

Fetching the instruction [[opcode]]s from program [[Computer memory|memory]] well in advance is known as [[prefetching]] and it is served by using a '''prefetch input queue''' (PIQ). The pre-fetched instructions are stored in a [[FIFO (computing and electronics)|queue]]. The fetching of opcodes well in advance, prior to their need for execution, increases the overall efficiency of the [[Microprocessor|processor]] boosting its speed. The processor no longer has to wait for the memory access operations for the subsequent instruction opcode to complete. This architecture was prominently used in the [[Intel 8086|Intel 8086 microprocessor]].

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	{{Use American English\|date = March 2019}}		{{Use American English\|date = March 2019}}

	Fetching the instruction [[opcode]]s from program [[Computer memory\|memory]] well in advance is known as [[~~Instruction prefetch\|~~prefetching]] and it is served by using a '''prefetch input queue''' (PIQ). The pre-fetched instructions are stored in a [[FIFO (computing and electronics)\|queue]]. The fetching of opcodes well in advance, prior to their need for execution, increases the overall efficiency of the [[Microprocessor\|processor]] boosting its speed. The processor no longer has to wait for the memory access operations for the subsequent instruction opcode to complete. This architecture was prominently used in the [[Intel 8086\|Intel 8086 microprocessor]].		Fetching the instruction [[opcode]]s from program [[Computer memory\|memory]] well in advance is known as [[prefetching]] and it is served by using a '''prefetch input queue''' (PIQ). The pre-fetched instructions are stored in a [[FIFO (computing and electronics)\|queue]]. The fetching of opcodes well in advance, prior to their need for execution, increases the overall efficiency of the [[Microprocessor\|processor]] boosting its speed. The processor no longer has to wait for the memory access operations for the subsequent instruction opcode to complete. This architecture was prominently used in the [[Intel 8086\|Intel 8086 microprocessor]].